This invention relates to the testing of electrical devices and, more particularly, to an apparatus and a method for performing both functional and parametric tests on complex circuits in a high-speed manner.
Testing an electrical device such as a complex integrated circuit is a relatively time-consuming and expensive process. The process usually includes conducting both functional and parametric tests. Functional tests require the availability of sets of input signals and corresponding sets of standard output signals. The correspondence therebetween is defined by a truth table or function table which in effect represents the desired operation of the circuit to be tested. Functional tests involve applying a set of input signals to the respective input terminals of the circuit under test. Output signals thereby generated by the circuit under test are applied to a comparator to which are also applied the standard corresponding set of output signals. In this way, the overall capability of the circuit under test to perform a specified logical function can be determined.
Functional testing alone is usually insufficient to provide assurance that a circuit can work with other interconnected circuits in a system context. To provide this assurance, other capabilities of the circuit must be tested. These other capabilities include fan-out (the ability of the circuit to drive other circuits) and fan-in (the load presented to other circuits by the circuit under test). Checking such other capabilities falls under the heading of parametric testing.
Parametric testing as heretofore practiced is typically done a terminal at a time. Further, plural test boards may have to be sequentially connected to a given terminal to test various different parameters of the circuit. It is apparent that such a conventional testing procedure is inherently slow and therefore relatively expensive.